News Archives

May 8, 2008 :

Interlaken products for Xilinx Virtex 5 FXT devices with built-in gearbox

• Sarance's Interlaken Products

August 31, 2007 :

Sarance White Paper: "Scaling Chip-to-Chip Interconnect Made Simple"

Sarance's high-performance Interlaken IP cores connect devices at up to 50 Gbps.

• Read the full White Paper
• Sarance's Interlaken Products

August 10, 2007 :

HiSilicon Licenses Sarance Interlaken Protocol IP

Ottawa, Canada and Shenzhen, PRC Aug 10, 2007 -- Semiconductor IP vendor Sarance Technologies Inc. and HiSilicon Technologies Co Ltd. today announced a licensing agreement that will see HiSilicon license Sarance's Interlaken Protocol IP core for use in HiSilicon ASIC and FPGA products.

• Read the full Press Release

May 30, 2007 :

Sarance White Paper: "Building Interlaken to SPI4.2 bridges using Sarance's Interlaken IP" as published in Programmable Logic Design Line

Interlaken is a relatively new chip-to-chip interconnect technology develop by Cisco Systems and Cortina Systems to help pave the way for the future of networking. Interlaken is based on low-power high-speed serial links and it is designed to be easily scalable to any bandwidth. It can meet the demand of today's 20 Gbps and tomorrow's 100 Gbps system by providing low pin-count, low-power serial connectivity, channelized protocol, robust error checking and management and low protocol overhead.

• Read the full White Paper
• Sarance's Bridging Solutions

January 24, 2007 :

Sarance Interlaken IP Cores and Cortina Systems' ASICs achieve 40Gbps interoperability

Sunnyvale & San Jose, Calif., January 24, 2007 -- Cortina Systems® (Cortina) and Xilinx, Inc. (NASDAQ: XLNX) today announced successful interoperability of the Virtex™-5 FPGA and Cortina's new CS3477 Ethernet MAC aggregation IC, via the Interlaken protocol.  Interlaken, an open specification for high-speed chip-to-chip packet transfers using the latest serial technology, enables component manufactures to scale their devices to 40 Gbps and beyond.

• Read the full Press Release

January, 2007 :

Live 40G Interlaken Demo at DesignCon

We will be showcasing a live demo of our Interlaken IP at DesignCon in Santa Clara, California at end of January 2007.  The demo is done in partnership with Altera® and will be located in Altera®'s booth (#503).

• Sarance at DesignCon

December 15, 2006:

• Sarance Technologies Delivers Interlaken IP Core for Xilinx Virtex-5 FPGAs

August 14, 2006:

• ConnectivityZONE Product Review: Altera®/Sarance IP Core for FPGAs

August 14, 2006:

• Altera®, Sarance join Cortina-Cisco coalition

April 03, 2006:

• Cortina Systems and Cisco Systems announce the Interlaken protocol specification

April 03, 2006:

• FACE-OFF Cisco challenges interconnect industry ( also featured on EE Times )