Interlaken <--> SPI-4.2 Bridge
Overview
Optical Internetworking Forum (OIF) System Frame Packet Interface Level 4 Phase 2 (SPI-4.2) is the most commonly used chip-to-chip interconnect technology for links up to 10Gbps of bandwidth. Most networking ICs use SPI-4.2 to transfer packets between devices. As demand for bandwidth increases, so does the required bandwidth between devices. To meet the increase in bandwidth demands, chip-2-chip interconnect technology is beginning to adopt high-speed serial I/O technologies to reduce the pin-count, cost and power of the interface. Interlaken is a scalable chip-to-chip interconnect protocol designed to enable transmission speeds from 10Gbps to 100Gbps and beyond.
Given the wide base of ICs using the SPI-4.2 interface and the long design cycles for new ICs, bridge devices are needed to connect ICs with SPI-4.2 interfaces to ICs with Interlaken interfaces. One such application is shown in Figure 1. The FPGA in Figure 1 is used to transfer packets between a port aggregation IC and a Network Processing Unit (NPU). The FPGA performs the translation between the two different protocols and also provides the required buffering to transfer packets across the two interfaces.
- Product Brief: Altera® Stratix® II GX
- Product Brief: Xilinx Virtex™-5
- White Paper: Interlaken to SPI4.2 bridge design
Key Features
- 10Gbps and 20Gbps bridges
- Compliant with the Interlaken Protocol Definition, Revision 1.1
- Compliant with Optical Internetworking Forum (OIF) System Frame Packet Interface Level 4 Phase 2 (SPI-4.2)
- In-band or out-of-band flow control and management in both directions
- Support for both packet and segmented modes of operation
- Statistics engine to keep track of bytes, packets and errors for traffic in both directions
- Simple processor interface for management and status information
Typical Application
